Newsgroup: comp.os.linux.development.apps

Bernhard Agthe wrote:
> Hi,
> 
> for a few days I've been trying but I didn't solve my problem yet. So I 
> present it here (shortened to the essentials) hoping someone can help me 
> ;-)
> 
> At the moment:
> 
> Files:
> - obj/
> - src/abc.c
> - lib/abc.c
> - Makefile
> - dependencies
> 
> Makefile (simplified):
> abc: obj/abc.o obj/abc.o
>  \t link-command
> obj/%.o: %.c
>  \t CC -c -o $@ $<
> include dependency
> 
> dependency file:
> obj/abc.o: src/abc.c
> obj/abc.o: lib/abc.c
> 
> As you can easily see this doesn't work. My solution is to change the 
> file names of the object files like this:
> - obj/src_abc.o (src/abc.c)
> - obj/lib_abc.o (lib/abc.c)
> 
> What I can do already is writing a Makefile with the new object file 
> names and change the dependency file. What I don't want to do (cannot) 
> is writing a separate rule for each source file (the "obj/%.o: %.c" 
> construct must stay, but can be modified). What I can't do is change the 
> file names.
> 
> Thanks for your help,
> Berny Agthe.

If I understand correctly, you want your rule to create object files of 
the form obj/src_abc.o.  To do this, modify the rule along the following 
lines:

obj/%.o: %.c
  \t CC -c -o `dirname $@`/`dirname $<`_`basename $@` $<

You could also do the above more efficiently by utilising the GNU make 
variable replace facilities.

-- 
Diomidis Spinellis
Code Quality: The Open Source Perspective (Addison-Wesley 2006)
http://www.spinellis.gr/codequality?colda

Unless otherwise expressly stated, all original material on this page created by Diomidis Spinellis is licensed under a Creative Commons Attribution-Share Alike 3.0 Greece License.